A reconfigurable circuit generally has a plurality of processor elements whose functions can be changed. The plurality of processor elements are generally arranged in a matrix and a selectively connectable network is provided among the plurality of processor elements.
Japanese Laid-Open Patent Publication No. 2006-163815 discloses a signal processor having a plurality of processor elements, each including a computing unit which performs arithmetic and logic operations, a bus which connects the plurality of processor elements, a switch section which changes connection of the bus, and a control circuit which controls the switch section in accordance with software.